The NCV4266-2CST50T3G is a 4-pin SOT-223 automotive LDO from onsemi. Unlike most SOT-223 regulators that use 3 pins, the NCV4266 adds a dedicated enable pin — pin 3. This page covers every pin, the typical application circuit, layout rules, and the mistakes that show up in production testing.
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | IN | Power Input | 5.5V to 45V input. Withstands +45V transients and -42V reverse battery. Bypass with 1µF electrolytic + 100nF ceramic placed as close as possible. Add a 1Ω series resistor with the ceramic cap to damp LC ringing from wiring harness inductance. |
| 2 | GND | Ground | Common ground for input, output, and thermal path. The exposed tab is internally connected to GND. Solder to a solid copper area for best thermal performance; if your assembly process requires thermal relief, use wide spokes. This pin carries both the load current return and the heat from the pass transistor. |
| 3 | EN | Digital Input | Enable pin. Active high. VIH ≥ 2.0V turns the output on. VIL ≤ 0.8V turns it off (Iq < 1µA). Do not leave floating — tie to IN through a 100kΩ resistor for always-on, or drive from a GPIO. Internal pull-down may not be present in all operating conditions. |
| 4 | OUT | Power Output | Regulated 5V output, 150mA max, ±2% accuracy. Requires 22µF output capacitor. The NCV4266 is stable with ceramic output capacitors (unlike the NCV4264). Place the output cap as close to Pin 4 and the GND tab as possible. |
The 1Ω resistor with CIN2 (100nF) prevents a failure mode that's hard to reproduce on a bench. Without it, the ceramic cap and wiring harness inductance form a high-Q LC tank. A load-dump or injector switching event excites that tank.
The resulting ringing at the NCV4266's input can exceed 45V even if the harness voltage stays within limits. The resistor costs a fraction of a cent.
For the EN pin: verify the GPIO high-level voltage meets 2.0V minimum across temperature. A 3.3V GPIO at -40°C might droop to 2.8V — still safe. A 1.8V GPIO won't reliably turn the regulator on. Use a level shifter or tie EN to IN with a 100kΩ pull-up.
A: No. The NCV4266 has 4 pins with EN on Pin 3. Standard 3-pin parts have different assignments. On a 3-pin SOT-223 like the NCP1117, Pin 1 is GND, Pin 2 is OUT, Pin 3 is IN. The NCV4266 uses Pin 1=IN, Pin 2=GND, Pin 3=EN, Pin 4=OUT. These are not drop-in swaps — verify the footprint for each part before committing to a layout.
A: The output becomes unpredictable. The NCV4266 datasheet specifies the EN pin must be driven — internal pull-down may not be reliable across all conditions. Several LDOs in this class (including Intersil ISL78310 and others confirmed on TI E2E) explicitly state EN has no internal biasing. A floating EN in an automotive environment picks up noise from nearby switching nodes. The fix: tie EN to IN through a resistor, or drive it from a GPIO.
A: Yes, it works, but a series resistor is cheap insurance. TI's E2E forum notes that hard-tying EN to VIN can cause output overshoot during slow VIN ramp-up. A 100kΩ resistor doesn't affect DC behaviour but lets you cut the trace for debugging. Some designs add a 10–100nF cap from EN to GND to delay enable until VIN stabilises.
A: The EN pin lets you shut down the output to <1µA via software. The 3-pin NCV4264 can't do that. If your ECU needs to kill the 5V rail in sleep mode, the NCV4266 does it with one GPIO. The NCV4264 needs an external load switch. On the flip side, the NCV4264's 3-pin layout is a drop-in for many legacy designs — pick based on whether you need shutdown control.
A: Per the onsemi NCV4266 datasheet (Rev 23): VIH ≥ 2.0V minimum over -40°C to +150°C. At room temperature, typical threshold is lower (~1.5V). At cold, it rises toward the 2.0V spec limit. A 3.3V GPIO works with margin. A 1.8V GPIO doesn't guarantee turn-on at cold — use a level shifter. This is a common pitfall discussed across LDO EN pin threads on StackExchange: always check the threshold at the worst-case temperature, not at 25°C.
A: At 150mA/12V in (1.05W), 300–500mm² of 1oz copper keeps the junction safe. EEVblog discussions on SOT-223 thermal design report RθJA of 104–140°C/W on a minimal pad, dropping to ~50–70°C/W with 500mm². At 1.05W, that's a 53–74°C rise — fine at 85°C ambient. SOT-223 doesn't need thermal relief spokes - it can't tombstone. Connect the tab directly to a copper pour.
A: Yes, but place them around the pad perimeter, not under the solder joint. EEVblog manufacturing discussions warn that solder wicks down open vias during reflow, creating voids under the tab. Use 4–8 vias (0.3mm drill) on a ~1.27mm grid around the pad, connecting to an inner ground plane. Filled or plugged vias eliminate the wicking risk entirely.
A: Yes, but the thermal math limits you. 45V in, 5V out at 150mA = 6W — SOT-223 can't dissipate that. The 45V rating is a load-dump survivability spec. At 45V continuous, safe load is ~20–30mA before hitting thermal limits on typical PCB copper. Above 24V input, reduce load current or add a pre-regulator. The package's thermal limit, not the voltage rating, sets the real ceiling.





