NCE2304 Pin Diagram and Pin Functions

Only one of the three pins is a signal. That is what makes a SOT-23 MOSFET easy to lay out badly: two of the three connections look like ordinary power nodes, and one of them is doing a second job.

Key Specifications for the Pins

Bars are drawn to scale against the 20V limit, so the gate pin's useful range is the short end of the chart. The part conducts from about 2.2V, is characterised at 4.5V and 10V, and dies at 20V.

Nothing in between is published. A gate held at 3.3V is in an uncharacterized region, and the resistance there is yours to measure rather than read.

Typical Application Circuit

The driver reference lands on pin 2, and that is the whole point of the drawing. In a three-pin package there is no separate source connection, so the gate loop and the load loop share the source lead.

That shared lead has inductance. Under a fast current edge it develops a voltage that appears in series with the gate drive — weakening the gate during turn-on and lifting it during turn-off.

Four-pin and Kelvin-source packages exist to break that coupling, and they work by giving the driver its own return straight to the die. A SOT-23 has no fourth lead, so the layout has to do the job instead.

PCB Layout Tips

Land the gate drive return on the source pin's copper, not on distant ground. The driver, the gate resistor and the source pad should form the smallest loop you can route. A return that reaches the source through a long ground path puts that path's inductance inside the gate loop.

Give pin 3 real copper. The drain pad is the only thermal path, and the 73.5°C/W figure assumes an FR4 board with a proper pour under it. The same board with a minimal pad is a different thermal resistance that no datasheet states.

Keep the gate resistor next to the gate pin. A resistor placed near the driver leaves the trace between it and pin 1 as part of the gate node, where it can pick up the drain's switching edge.

Separate the high-di/dt loop from the gate loop by geometry, not by net name. The load loop runs from the source pin, through the load, to the rail and back through the drain.

The gate loop runs from the driver, through the resistor, into pin 1 and back to pin 2. The two meet at one point by necessity — keep them from running alongside each other anywhere else.

Do not route the gate trace under the drain pad. It is the switching node on one side and the most sensitive node on the board on the other, and a SOT-23 puts them a millimetre apart at the package.

Common Mistakes on This Footprint

Returning the gate driver to board ground instead of the source pin

This is the mistake the package invites. In a low-side switch pin 2 is a ground node, so a driver returning to ground copper looks correct on the schematic.

It is not correct on the board. The return has to be the source pad itself, or the load current's inductance ends up modulating the gate.

Treating the drain pad as an ordinary connection

Pin 3 is the load connection and the heatsink at the same time. A layout that routes the drain with a minimum-width trace has chosen a thermal resistance well above the published figure, and the symptom is a part that runs hot at currents it should handle.

Assuming any SOT-23 footprint will fit

The package is drawn in several pad variants, and library parts differ between them. The pin numbering is standard, the land pattern is not, and a footprint lifted from another design is worth checking against the package drawing before it is committed.

Fitting a SOT-23 transistor or diode into a MOSFET footprint

SOT-23 carries BJTs, diodes, references and MOSFETs, and the pin functions differ between them. The pads are interchangeable, which is what makes the substitution physically possible and electrically wrong.

Reading the marking as decoration

The marking on this package is the part number — 2304 on this part and 2303 on the P-channel part in the same family. The two share pads and pin numbers, so the marking is the only thing on the body that tells them apart, and it differs by one digit.

Driving the gate from a rail that can overshoot

The ±20V limit is the widest in this footprint class, and it is still a limit. A gate driven from a 12V rail with ringing has less margin than the number suggests, and a bootstrap supply referenced to a switching node can exceed it.

Frequently Asked Questions

Q1: Which pin is which on the NCE2304?

A: Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. That is the standard SOT-23 MOSFET arrangement. A dot or chamfer at one corner of the body marks pin 1, and from there pins 1 and 2 sit on one edge with pin 3 opposite pin 2.

Q2: What is printed on the package?

A: The part number itself — 2304. The NCE2304 and its P-channel sibling the NCE2303 share the same pads and the same pin numbers, and the markings differ by one digit. On this footprint the marking is the only thing on the body that identifies the part.

Q3: Where should the gate resistor return to?

A: The source pin's copper, not board ground. In a three-pin package the source lead carries the load current and the gate return together, so its inductance is inside the gate loop. Returning the driver to distant ground adds that ground path's inductance to the same loop.

Q4: Why does source inductance matter so much on a small package?

A: Because the source lead is shared by both loops and the package offers no way to separate them. Four-pin and Kelvin-source devices exist specifically to give the gate driver its own return to the die. With three leads the coupling is fixed, and only the layout can reduce it.

Q5: Can the gate be driven from a 3.3V logic pin?

A: It will turn on, but the resistance it turns on at is not published. This part's on-resistance rows are at 4.5V and 10V. The 2.2V maximum threshold means a 3.3V drive is above threshold everywhere, but the region between threshold and 4.5V is uncharacterized.

Q6: How much copper does the drain pad need?

A: Enough that the board is the thermal resistance the datasheet assumed. The 73.5°C/W figure is stated for an FR4 board under a ten-second condition, not for a minimum-width trace. Below the assumed copper area, the real thermal resistance is higher and unpublished.

Q7: Can I use the same footprint for the NCE2303?

A: Physically yes, and it is the wrong part to fit. The NCE2303 is P-channel with the same pads and pin numbers. It will not show a pin error, because there is none — the difference appears as a body diode conducting in the opposite direction.

Q8: Is the pin arrangement the same on every SOT-23 MOSFET?

A: Among MOSFETs, yes — pin 1 gate, pin 2 source, pin 3 drain is the convention. It is not the convention for the other parts that share the package. SOT-23 also carries BJTs, diodes and references, and those use different pin functions on the same three pads.