The right shift register comes down to one question: what will the outputs drive? LEDs on a bench — the 74HC595. A TTL-level 5V bus — the 74HCT595. Loads that need real current — the open-drain TPIC6B595. And if you want streaming transparency with complementary serial outputs — the 74HC4094.
In the logic IC lots we process from Shenzhen (2025–2026), the most common mistake in this socket is ordering a "74HC595" by habit and receiving a 4094 — or worse, building around a 4094 while the code pulses it like a 595.
Both chips shift eight bits. They latch differently, and the difference shows up as glitches you cannot see on a logic probe.
This guide walks the family: what a shift register actually is, where the latch behavior splits, when the open-drain cousins take over, and a decision framework you can apply before you buy.
A shift register turns three MCU pins into eight outputs. You clock bits in one at a time on SRCLK, then one latch pulse on RCLK makes all eight outputs change together.
Add a second chip and the same three pins drive sixteen outputs — the chain grows one wire at a time through the serial output.
The 74HC595 class does this at ~100MHz shift rates with 26ns propagation delays (A-suffix parts), drawing 4µA quiescent. It runs from 2.0V to 6.0V, so the same part serves 3.3V and 5V designs.
The outputs are push-pull 3-state, rated for about 8mA per pin — enough for an LED with a series resistor, not enough for a solenoid.
| Registers in Chain | Outputs | MCU Pins Used |
|---|---|---|
| 1 | 8 | 3 |
| 2 | 16 | 3 |
| 3 | 24 | 3 |
| N | 8N | 3 |
Why the latch matters more than the shifting: without it, every bit you clock in would smear across the outputs in real time — a display would show shifting garbage between frames.
The latch holds a complete byte and swaps it in one pulse. The chip is really a 3-pin-to-8-output atomic update device.
74HC595 and 74HC4094 both shift eight bits, but they latch on different rules. The 595's RCLK is edge-triggered — data freezes into the outputs on the rising edge, no matter what the clock is doing.
The 4094's STROBE is level-sensitive — while strobe is high, the outputs are transparent and track the shift register. They latch on the strobe's falling edge.
That single difference breaks code compatibility. Arduino-style code pulses RCLK once after shifting — a 595 habit.
Run the same code on a 4094 and the outputs go transparent during the strobe pulse, showing intermediate states before freezing at the end. The display flashes, the LEDs flicker, and the logic analyzer shows everything “working.”
| Parameter | 74HC595 | 74HC4094 |
|---|---|---|
| Latch control | RCLK, edge-triggered | STROBE, level-sensitive |
| Latch moment | Rising edge of RCLK | Falling edge of STROBE |
| Output Enable | OE, active-low | OE, active-high |
| Shift register clear | SRCLR, active-low | None |
| Serial outputs | Q7S (single) | QS + QS¯ (complementary) |
| Pinout vs 595 | — | Different layout |
In the field, we see the reverse swap too: a design that genuinely needs the 4094's streaming behavior gets built with a 595, and the code fights the missing transparent mode.
Check the part number before you write the firmware, not after.
When the load crosses from LED territory into relay and solenoid territory, the push-pull 595 class stops being enough. The TPIC6B595 keeps the same shift-register protocol — clock in eight bits, strobe them out — but its outputs are open-drain, rated 150mA per channel.
That is roughly 18 times the per-pin current of a 74HC595. The price: it can only sink current. Loads must connect between a positive rail and the output — the chip cannot source, so a common-cathode LED array is wired differently than with a 595.
Two more differences matter at ordering time: the pinout is not the 595's (the output enable is renamed "G"), and the TPIC6B595 family has its own current tiers — the TPIC6C595 at 100mA per channel, with 250mA and 350mA variants in the family for heavy loads.
| Part | Output Type | Per-Channel Current | Can Source? |
|---|---|---|---|
| 74HC595 | Push-pull 3-state | ~8mA | Yes |
| 74HCT595 | Push-pull 3-state | 8mA @4.5V | Yes |
| TPIC6C595 | Open-drain | 100mA | No — sink only |
| TPIC6B595 | Open-drain | 150mA | No — sink only |
A rule of thumb we give buyers: if the load is a bare LED with a resistor, any 595 works.
If the load is a relay coil, a solenoid, or an LED strip drawing tens of milliamps, move to the open-drain class before you let the magic smoke out of a push-pull output.
The HCT and AHC variants exist for interface compatibility, not for more outputs. The 74HCT595 accepts TTL-level inputs and runs 4.5V–5.5V — the drop-in choice when the driving logic is 5V TTL or LSTTL and the HC part might misread the levels. Same pinout, same edge-triggered latch, no code change.
The 74AHC595 targets speed: 2.0V–5.5V, propagation delays in the 4–10.5ns class (manufacturer-dependent), and maximum clock rates up to 170MHz. If the design feeds the register from fast SPI and the timing budget is tight, AHC earns its extra cent.
One warning we repeat in cross-reference calls: HCT is not a 3.3V part. Its 4.5V–5.5V range means a 3.3V design must stay with HC or AHC — ordering HCT for a 3.3V rail is a silent inconsistency that shows up in production, not in the prototype.
Start with the load, then the interface, then the speed.
✅ Pick the 74HC595 when: outputs drive LEDs, 7-segment displays, or logic inputs; you want the standard edge-triggered latch every tutorial assumes; and you may chain registers for more outputs. This is the default answer for the vast majority of designs.
✅ Pick the 74HC4094 when: you specifically need streaming transparency (outputs track the shift register while strobe is high) or complementary serial outputs QS/QS¯. Be ready to write latch code that matches its strobe behavior.
✅ Pick the TPIC6B595 when: the load sinks more than ~8mA per channel — relays, solenoids, high-current LED rows. Remember: sink-only, and the pinout differs from the 595.
✅ Pick the 74HCT595 in a 5V TTL system; pick the 74AHC595 when the shift clock must run at the family's practical maximum.
❌ Don't use any shift register when: you need PWM dimming (use a dedicated LED driver), the signal is analog (that is the 74HC4052's job), or you want to address one-of-many (the 74HC138 decoder does selection, not shifting).
A shift register answers "all of these, held" — not "which one," and not "route the signal."
The framework in one sentence: if the load fits a push-pull pin, take the 595 (HCT for TTL, AHC for speed); if it sinks current, take TPIC6B595; and if you need transparency, 4094. Every other answer is a different chip class entirely.
A: Latch behavior, OE polarity, and pinout. The 595 latches on the RCLK rising edge; the 4094's STROBE is transparent while high and latches on its falling edge. The 4094's OE is active-high, it has no shift-register clear, and its pinout differs — not a drop-in.
A: Yes — the shift protocol is identical, but the wiring differs. The TPIC6B595 has open-drain outputs (sink only) and a different pinout (OE renamed G). Shift code survives; board layout does not.
A: Eight directly, at about 8mA each with per-LED resistors. Chain more registers for more LEDs — each chip adds eight outputs and one wire. For brighter LEDs, buffer the outputs or move to the open-drain class.
A: Latch timing and refresh speed — the usual causes are latching mid-shift or refreshing too slowly. The forum fixes: turn OE off before latching and back on after, latch after shifting completes, and use hardware SPI instead of bit-banged shiftOut for faster, cleaner updates.
A: No — HCT runs 4.5V–5.5V only. For 3.3V rails use the HC (2.0V–6.0V) or AHC (2.0V–5.5V) versions.
A: ICMASS stocks the 74HC595, 74HCT595, and TPIC6B595 families in 16-pin packages, shipped same-day from Shenzhen. Contact us for pricing and availability on your specific quantity.





