The difference in one line: the 595 adds digital outputs, the 138 selects one output from an address, and the 4052 routes analog signals. Same 2V–6V family, same 16-pin bodies, three different jobs.
Pick the 595 when outputs must hold their state; pick the 138 when exactly one line should be active at a time; pick the 4052 when the signal crossing the switch is analog.
In the logic IC lots we process (2025–2026), the swap that costs the most bench time is using a 138 where a 595 belongs — the design wants eight outputs held at once, and the decoder can only ever light one.
They answer different questions. The 138 says "which one," the 595 says "all of these," the 4052 says "the signal itself."
| Parameter | MC74HC595A | SN74HC138N | MC74HC4052A |
|---|---|---|---|
| Core function | 8-bit shift register + latch | 3-to-8 decoder/demux | Dual 4:1 analog mux/demux |
| Answers the question | "All of these, held" | "Which one" | "Route the signal" |
| Outputs | 8 parallel + 1 serial, push-pull 3-state | 8, active-low | 2 × 4 channels + 2 commons |
| Signal type | Digital levels only | Digital levels only | Analog, VEE to VCC |
| Supply voltage | 2.0V–6.0V | 2.0V–6.0V | 2.0V–12.0V (VCC–VEE) |
| Control inputs | DATA, SRCLK, RCLK, OE, SRCLR | A, B, C + G1, G2A, G2B | A, B + EN |
| Multiple outputs at once | Yes — latched state holds | No — one active at a time | One channel per block |
| Propagation delay | 26ns typical | 15ns typical | Switch, no logic delay spec |
| Quiescent current | 4µA | 8µA | 1µA |
| Output current | ~8mA per pin (70mA total) | ±4mA, 10 LSTTL loads | None — Ron ~190Ω pass-through |
| Expansion | Cascade indefinitely via SQ_H | 2 chips → 4-to-16, no inverters | Fixed 8 channels (2×4) |
| Negative/bipolar signals | No | No | Yes, with VEE rail |
| Package | SOIC/TSSOP/PDIP-16 | PDIP-16 | SOIC/TSSOP/DIP-16 |
| Typical role | LED rows, displays, I/O expansion | Memory decode, chip select | Audio routing, ADC front ends |
The whole comparison in one row: the 595 is the only one of the three that holds multiple outputs at once — that latch is the entire reason it exists.
The 138 is the only one with a real address-to-output delay spec. The 4052 is the only one that passes a voltage, not a logic state.
The 595 moves state — bits you clock in and latch. The 138 moves selection — an address becomes one active line. The 4052 moves the signal itself — a voltage from VEE to VCC, unchanged except for the 190Ω of switch resistance. This is the whole story; everything else follows from it.
The 595's storage latch lets eight outputs hold different values simultaneously — a decoder cannot do that by construction. The 138's three enables gate the decode with your own strobes, which the shift register cannot do.
And neither digital part can touch a bipolar audio signal — only the 4052's VEE rail makes that possible.
The 595 cascades without limit — SQ_H feeds the next chip's data pin, and the chain grows one wire at a time. The 138 cascades by address — two chips plus one inverter make a 4-to-16.
The 4052 expands by pairing — each chip already carries two 4:1 blocks. The forum-proven trick: a 138's outputs enable several muxes while address lines are shared.
Using a 138 where a 595 belongs: the design needs eight outputs held at once, the decoder lights one at a time, and the display flickers or the LEDs fight each other.
Using a 595 where a 138 belongs: address decoding turns into serial shifting, and the chip-select timing falls apart. They are complementary, not interchangeable — that is why a board usually has more than one of them.
You need eight or more digital outputs that hold their state — LED rows, 7-segment displays, relay banks, or MCU I/O expansion. Three pins drive eight outputs; each extra chip adds eight more. If the loads need more current, move to the TPIC6B595 open-drain class.
You need to select one line from an address — memory chip select, peripheral enables, or routing data to one of eight destinations. The active-low outputs match CPU chip-select conventions, and the three enables gate the decode with strobes. For active-high selects, take the 74HC238.
The signal is analog — audio, sensors, bipolar rails, or ADC front ends. Two 4:1 blocks carry stereo or two sensor banks on the same address. Watch the 190Ω Ron in precision paths — buffer the output or step up to a low-Ron mux class.
Boards use all three: the 595 expands the MCU’s outputs, the 138 decodes which peripheral bank is addressed, and the 4052 routes the sensor signals into the ADC. The tree is a starting point — the real answer is often "one of each."
A: Only if you change the design — they are not drop-in equivalents. The 595 holds eight outputs at once but has no address decoding; the 138 lights exactly one output per address but cannot hold a pattern. The classic failure: using a decoder where the design needs eight held outputs.
A: Yes, it passes any voltage within VEE–VCC — and the HC version works directly from a 3.3V MCU. An All About Circuits thread on using the 74HC4052 with a 3.3V MCU confirms the HC version’s CMOS thresholds (~1.5V at VCC=2V) drive cleanly, unlike the old CD4052’s 3.5V high threshold at 5V. But pure digital routing is still better served by the 595 or 138.
A: Cascade 595s — SQ_H to the next chip's data pin, shared clocks, one latch pulse updates everything. Sixteen outputs from three MCU pins with two chips, and the chain grows indefinitely. Keep one decoupling cap per chip.
A: Cascade 138s — two chips plus one inverter make a 4-to-16 decoder. The fourth address bit steers the two chips via their G1 enables; A0–A2 are shared. For 24 lines, three 138s need no inverters at all.
A: The 74HC595 — its latched outputs hold every LED's state between scans. A decoder would fight you: only one line can be active, so rows would need continuous re-scanning without storage. Two chained 595s drive a standard 8×8 matrix.
A: The 74HC138 — active-low outputs and three enables match CPU chip-select conventions. Gate the decode with RD/WR strobes and the address lines, and two devices can never be enabled at the same time.
A: The 74HC4052 (or the 8:1 74HC4051 for a single bank). Buffer the mux output so the 190Ω Ron and source impedance don't form a divider against the ADC’s accuracy budget.
A: Volume pricing typically ranges from $0.03–$0.15/unit depending on part and quantity. ICMASS stocks the 74HC595, 74HC138, and 74HC4052 families in 16-pin packages and ships same-day from Shenzhen. Contact us for a quote on your specific quantity.





