NCE4606 Pin Diagram

The channel numbering runs opposite to the pin numbering. Channel 1 is the P-channel and it occupies pins 3, 4, 5 and 6 — the middle. Channel 2 is the N-channel on pins 1, 2, 7 and 8 — the outside. The pin-1 dot is at the upper left.

But why is the P-channel in the middle? The datasheet doesn't say. What it does show is that channel 1 occupies the center pins and channel 2 the outer ones — so the pin table, not intuition, is the only authority here.

And the two channels are electrically independent. D1 on pins 5–6 and D2 on pins 7–8 are separate terminals with no internal tie, so the complementary pair is wired by you on the board.

Key Specifications of the NCE4606

There is no 4.5V resistance row for either channel. Both are specified at 10V only, so this is a 10V-drive part even though the thresholds are low. There is also no avalanche rating and no body-diode recovery time published.

Typical Application Circuit

The N-channel does the level shifting and the P-channel does the switching. A logic input on G2 turns the N-channel on, which pulls the P-channel gate node down through R1; that in turn enhances the P-channel and delivers the rail to the load.

When the N-channel turns off, R1 pulls the P-channel gate back to V+ and the switch opens.

Two things follow from the pinout. The P-channel gate node swings between V+ and ground, so its gate-to-source voltage reaches the full rail in the on state — keep the rail at 15–18V or clamp it, because the limit is ±20V.

What about the transition, when both channels conduct? R1 and the N-channel gate drive set how long that overlap lasts, and the crossover current through both channels flows for exactly that long.

The rail voltage and the gate limit are the same number in this topology. A 12V rail leaves 40% margin; an 18V rail leaves 10%; a 24V rail exceeds the maximum outright, because the on-state gate-to-source voltage of a high-side P-channel is the whole supply.

Common Mistakes When Using the NCE4606

1. Wiring by channel number instead of pin number. This is the big one. A designer who assumes channel 1 sits on pins 1 and 2 will connect the P-channel source where the N-channel source belongs. Pin 1 is S2, pin 3 is S1 — the numbers do not line up.

2. Carrying the pin map over from a dual P-channel part. The NCE4953 and NCE4963 share this exact SOP-8 footprint and put S1 on pin 1 and S2 on pin 3 — the mirror image of this part. Same package, swapped channels, and the pin-1 dot marks a different corner.

3. Trusting the datasheet's figure captions. On page one of the v1.0 sheet, the pin drawing appears under the heading “Schematic diagram” and a generic package photo appears under “Marking and pin assignment.”

The information is all there — the labels are just attached to the wrong figures. Readers who skip the drawing because its caption sounds generic will miss the pinout entirely.

4. Assuming the two channels share a drain. They don't. D1 (pins 5–6) and D2 (pins 7–8) are independent, so a design that relies on a common-drain node inside the package will simply not conduct.

5. Driving a 24V high side from a resistor pull-up. With the P-channel source at the rail, the on-state gate-to-source voltage equals the whole supply. At 24V that is −24V against a ±20V maximum. The failure is a slow leakage drift, not an immediate short — the worst kind to debug.

6. Expecting specified performance below 10V gate drive. The thresholds are low — 1.6V typical on the N-channel, −1.9V on the P-channel — but there is no resistance row below 10V. Partially enhanced is an uncharacterized state, and the temperature rise is yours to discover.

7. Reading 2.0W as a continuous rating. The only thermal row in the sheet is 62.5°C/W measured on FR4 at t ≤ 10 sec, per channel. At the printed −7A the P-channel already dissipates 1.62W — 81% of that budget — and the budget itself expires after ten seconds.

Where to Buy the NCE4606

ICMASS stocks the NCE4606 with its official v1.0 datasheet on hand, sample-tested at the published condition: 30mΩ max on the N-channel and 33mΩ max on the P-channel, both at 10V.

The clone to watch is VBsemi's NCE4606-VB, a pin-compatible pair marked VBA5325. It publishes 2.5V and 4.5V resistance rows that the NCE original does not have at all. If the sheet shows low-voltage resistance lines, it is not the NCE part.

The rest of the dual-MOSFET shelf ships alongside it — the dual-P NCE4953 and NCE4963 and the dual-N NCE9926 — so a polarity change is a substitution rather than a new sourcing round.

Frequently Asked Questions About the NCE4606 Pinout

Q1: Which pin is which on the NCE4606?

A: Pin 1 is S2, pin 2 is G2, pin 3 is S1, pin 4 is G1, pins 5 and 6 are D1, and pins 7 and 8 are D2. The N-channel sits on pins 1, 2, 7 and 8; the P-channel on 3, 4, 5 and 6. The pin-1 dot is at the upper left of the package.

Q2: Why is the P-channel in the middle of the package?

A: That is simply how this die is laid out — and it is why channel numbers and pin numbers disagree. Channel 1 is the P-channel on the center pins; channel 2 is the N-channel wrapped around the outside. There is no convention to fall back on here, so the pin table is the only authority.

Q3: Can I use the NCE4953 pinout instead?

A: No — the channel numbers are swapped. The NCE4953 puts S1 on pin 1 and S2 on pin 3, the reverse of this part, in the identical SOP-8 package. Substituting between the complementary and dual-P parts without re-reading the pin map is a reliable way to build a short.

Q4: Are the two drains connected inside the package?

A: No, they are independent. D1 occupies pins 5–6 and D2 occupies pins 7–8, and there is no internal tie between them. Any circuit that expects a common drain node has to create it on the board.

Q5: What is the datasheet's figure caption problem?

A: The two captions on page one are attached to the wrong figures. The pin drawing sits under “Schematic diagram” and a generic SOP-8 photo sits under “Marking and pin assignment.” The pinout is fully drawn and legible — it is just labelled as something else, which is easy to skim past.

Q6: Can I use it as a high-side switch on a 24V rail?

A: Not with a simple resistor pull-up. The P-channel source sits at the rail, so turning the channel on pulls the gate to ground and puts the full supply across gate-to-source — −24V against a ±20V maximum. Clamp gate-to-source with a Zener, or keep the rail at 15–18V.

Q7: What gate drive does it need?

A: A real 10V, because that is the only condition specified. Thresholds run 1.0–3.0V on the N-channel and −1.5 to −2.5V on the P-channel, but neither channel has a resistance row below 10V. An MCU pin that only reaches 3.3V or 5V leaves the channel partially enhanced with no published resistance.

Q8: How do I tell a genuine NCE4606 from a clone?

A: Check the marking, then check the sheet. Genuine parts are marked “4606” and publish resistance rows only at 10V. VBsemi's NCE4606-VB is marked VBA5325 and adds 2.5V and 4.5V rows. A part that looks better on paper at low voltage is a different die.