The NCE30H14K is a 30V, 140A N-channel MOSFET from Wuxi NCE Power in a TO-252-2L package, datasheet v3.0. Its pinout is the industry DPAK arrangement: pin 1 gate, pin 2 drain, pin 3 source.
Pin 2 is the tab. Not a mounting aid, not a heatsink connection — the tab is the drain terminal, and it is the same piece of copper that carries the heat out of the die.
That single fact decides how the part is laid out, and getting it wrong is one of the few mistakes on this package that cannot be fixed by fitting a different part.
The rest of this page covers what the three pins are, a typical low-side circuit, and the six errors that come up most often around this package in practice.
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | Input | Gate of the N-channel. Threshold 1.0V min / 1.6V typ / 2.5V max. Rated ±20V. |
| 2 | Drain | Power | The metal tab. Also the primary thermal path out of the die. 30V rating. |
| 3 | Source | Power | Source and the return for both the load current and the gate drive. |
The tab is the drain because of how the die is built. In a vertical MOSFET the source and gate sit on the top face of the die, and the drain is on the bottom face.
That bottom face is bonded directly to the leadframe for thermal contact, so the tab and the drain are the same conductor.
That is why no manufacturer offers a DPAK with a different pin order. The package's thermal design and its electrical pinout are the same decision.
| Parameter | Value |
|---|---|
| Drain-Source Voltage (VDS) | 30V |
| Gate-Source Voltage (VGS) | ±20V |
| Continuous Drain Current (ID) | 140A @ TC = 25°C / 99A @ TC = 100°C |
| Pulsed Drain Current (IDM) | 400A |
| RDS(on) @ 10V | 3.0mΩ max (typ 2.5mΩ, ID = 20A) |
| RDS(on) @ 4.5V | 4.7mΩ max (typ 3.6mΩ, ID = 20A) |
| Gate Threshold (VGS(th)) | 1.0 / 1.6 / 2.5V @ 250µA |
| Total Gate Charge (Qg) | 80nC @ VGS = 10V |
| Gate-Drain Charge (Qgd) | 18.3nC |
| Ciss / Coss / Crss | 3780 / 448 / 410pF |
| Internal Gate Resistance (RG) | 1.6Ω |
| Body Diode Current (IS) | 140A — equal to the channel rating |
| Thermal Resistance (RθJC) | 1.25°C/W |
| Thermal Resistance (RθJA) | 50°C/W on 1in² FR-4, 2oz copper, still air |
| Operating Junction Temperature | −55°C to 175°C |
The 1.6Ω internal gate resistance belongs in any gate-current calculation, because it sits in series with whatever you add externally and it is inside the package. With 80nC of gate charge behind it, the gate node is the slowest and the most sensitive part of this circuit.
Two details in that circuit are worth naming. The gate-source resistor holds the gate at zero when the driver is high-impedance, which matters on a part whose threshold starts at 1.0V.
And the source pin carries the load return and the gate-drive return on the same conductor. There is no separate Kelvin source on a three-lead DPAK, so any voltage the return path develops under di/dt appears between gate and source.
That is the whole reason the ground layout below matters more than the component choices.
Laying out the package as gate-source-drain instead of gate-drain-source leaves boards that conduct through the body diode no matter what the gate does. The switch never turns off, and the high-side device stays on.
It cannot be fixed by substituting a part, because the pin order is fixed by the package's thermal construction. The board gets respun.
The copper has to extend past the tab, or the heat has nowhere to spread. The 1.25°C/W junction-to-case figure describes the die-to-tab path only, and everything beyond it is your board.
Two-ounce copper roughly halves spreading resistance against one ounce, and a via array under the tab is what moves heat to inner and bottom layers.
Separating the power ground from the driver ground gives the gate-drive return current a long way around the board. The inductance it picks up develops a voltage that subtracts from the gate drive, so the FET turns on more slowly and runs hotter than the switching loss calculation predicts.
A single unsplit plane with a short return is the fix, not a filter.
The 1.6Ω inside the package is in series with whatever resistor you fit, and it caps peak gate current. With 80nC of gate charge, a driver sized without that number will be slower than its datasheet suggests.
Rules of thumb disagree anyway: scaling by total charge points at roughly 3Ω, by Miller charge at 0 to 1Ω, and by one ohm per nanofarad of input capacitance at about 3.8Ω. Start from one, then measure.
The body diode is rated the full 140A, but it drops 1.2V doing it. At 140A that is 168W in the diode against 59W through 3mΩ of channel.
The rating is a limit, not a design point. In a freewheeling path that carries real current, add an external diode or pick a topology where the channel conducts instead.
Gate-drive loops want to be short, and a metre of wire between a controller and this gate is a loop. The inductance rings with the 3780pF of input capacitance, and the gate-drain capacitance couples the drain swing back in.
Keep the driver within about an inch if you can, route the gate and its return together so their fields cancel, and probe at the pins rather than at the driver output when you go looking for the ringing.
ICMASS stocks the NCE30H14K and the rest of its 30V TO-252 family — 3050K, 3080KA, 3095K, 30H10K, 30H12K and 30H15K — with the official datasheets on hand.
We sample lots at the sheet's own condition: 3.0mΩ maximum at 10V and 4.7mΩ at 4.5V, both measured at 20A. Orders ship same day from Shenzhen.
A: Pin 2, and pin 2 is the metal tab. The tab is not a separate heatsink connection — it is the drain terminal and the thermal path at the same time. Viewed from the top with the tab up, pin 1 is on the left and pin 3 on the right.
A: Because of how the die is built. In a vertical MOSFET the source and gate are on the top face of the die and the drain is on the bottom. That bottom face is bonded to the leadframe for thermal contact, so the tab and the drain are the same conductor by construction.
A: The body diode conducts regardless of the gate, so the switch does not turn off. The pin order is a property of the package, so no substitute part fixes it. The board has to be respun.
A: Yes, when the driver can go high-impedance. The threshold starts at 1.0V, and with a floating gate node, leakage and capacitive coupling can lift it past that. The resistor holds the gate at source potential when nothing is driving it.
A: More than the tab outline. A pad cut exactly to the tab leaves the heat nowhere to go. Extend the copper beyond the tab, use two-ounce copper where you can, and put a via array under the tab to reach inner layers.
A: No — a three-lead DPAK does not have one. The source pin carries both the load return and the gate-drive return, so return-path voltage appears between gate and source. That is why the ground layout matters more than the parts list.
A: 1.6Ω, and it is inside the package. It sits in series with your external resistor and limits peak gate current regardless of the driver. Any gate-current or switching-time calculation should include it.
A: On this part, no — 80nC is too much charge for a port pin to move quickly. The family's 50A member carries 32.3nC and is the one to use when a logic pin has to drive the gate directly.





