Four N-channel MOSFETs, one TO-252-2L footprint, all from Wuxi NCE Power: NCE30H10K (30V/100A), NCE30H12K (30V/120A), NCE30H15K (30V/150A) and NCE40H12K (40V/120A).
The headline current is the easiest column to read and the least useful one. All four derate to about 70% at a 100°C case — 100A to 70A, 120A to 84A, 150A to 105A, 120A to 85A. The family stamps the same curve on every part.
What actually separates them is the gate-drive floor: two publish a 4.5V resistance row and two publish none. That is a silicon difference, not a marketing tier.
The third axis is die generation, and it runs against intuition: the 40V part guarantees a lower resistance than either 30V part at the same current class.
This page lines all four up, marks where the printed numbers stop being comparable, and says which one to pick — including when the honest answer sits outside the family.
| Parameter | NCE30H10K | NCE30H12K | NCE30H15K | NCE40H12K |
|---|---|---|---|---|
| Drain-Source Voltage (VDS) | 30V | 30V | 30V / 35V typ | 40V / 45V typ |
| Gate-Source Voltage (VGS) | ±20V on all four | |||
| Continuous ID @ TC = 25°C | 100A | 120A | 150A | 120A |
| Continuous ID @ TC = 100°C | 70A | 84A | 105A | 85A |
| 100°C / 25°C ratio | 70% | 70% | 70% | 71% |
| Pulsed Drain Current (IDM) | 400A | 400A | 600A | 330A |
| RDS(on) max @ 10V | 5.5mΩ (typ 4.0) | 4.5mΩ (typ 3.5) | 4.0mΩ (typ 3.0) | 4.0mΩ (typ 3.6) |
| RDS(on) max @ 4.5V | not published | not published | 5.0mΩ (typ 4.4) | 7.0mΩ (typ 5.8) |
| Gate Threshold (VGS(th)) | 1.0 / 1.6 / 3.0V | 1.0 / 1.6 / 3.0V | 1.2 / 1.7 / 2.5V | 1.2 / 1.8 / 2.5V |
| Forward Transconductance (gfs) | 50S | 50S | 32S | 26S |
| Input Capacitance (Ciss) | 3300pF @ 25V | 4120pF @ 25V | 5000pF @ 15V | 5400pF @ 20V |
| Output Capacitance (Coss) | 1300pF | 498pF | 1135pF | 970pF |
| Reverse Transfer (Crss) | 200pF | 456pF | 563pF | 380pF |
| Total Gate Charge (Qg) | 100nC | 79nC | 38nC | 75nC |
| Gate charge test conditions | VDS 15V, ID 30A | VDS 15V, ID 20A | VDS 15V, ID 30A | VDS 20V, ID 20A |
| Gate-Source / Gate-Drain Charge | 25 / 45nC | 9 / 18nC | 9 / 13nC | 10.5 / 17nC |
| Turn-off Delay (td(off)) typ | 25ns | 38ns | 91ns | 52ns |
| Switching test load (RL) | 0.75Ω (ID 60A) | 0.75Ω (ID not stated on the row) | 15Ω (ID 2A) | 1Ω (ID 2A) |
| Body Diode VSD | 1.2V max @ 20A | 1.2V max @ 20A | 1.2V typ @ 10A | 1.2V typ @ 40A |
| Reverse Recovery (trr / Qrr) | 56ns / 110nC @ 60A | 58ns / 115nC @ 60A | 42ns / 39nC @ 40A | 42ns / 45nC @ 40A |
| Single-Pulse Avalanche (EAS) | 350mJ (0.5mH) | 350mJ (0.5mH) | 1700mJ (1mH, 58.5A) | 1080mJ (1mH, 46.5A) |
| Max Power Dissipation (PD) | 110W | 120W | 130W | 120W |
| Derating Factor | not published | not published | 0.87W/°C | 0.8W/°C |
| Thermal Resistance (RθJC) | 1.36°C/W | 1.25°C/W | 1.15°C/W | 1.25°C/W |
| Implied hot RDS(on) — derived | 11.3mΩ (2.04×) | 8.5mΩ (1.89×) | 5.9mΩ (1.48×) | 8.3mΩ (2.08×) |
| Junction temperature range | −55°C to 175°C on all four | |||
| Package / pinout | TO-252-2L, 1 = Gate, 2 = Drain, 3 = Source, tab = Drain on all four | |||
The last row of data before the shared rows is the one nobody prints. Back-calculate each sheet's own ID(100°C) row against its own RθJC and its own 25°C maximum, and you recover the hot resistance each die actually carries.
Do that for all four and the 100°C currents stop looking like a family trait:
Four different dice, four different thermal resistances, and the same 70% haircut. The 100°C column is not a measurement — it is the same thermal calculation applied four times.
All four switch fine at 10V. Only two are characterized below it: the 30H15K at 5.0mΩ and the 40H12K at 7.0mΩ, both at a 4.5V gate and a 10A test current. The 30H10K and 30H12K publish no low-voltage row at all.
The 40V 40H12K guarantees 4.0mΩ at 10V; the 30V 30H12K guarantees 4.5mΩ at the same 20A test current, the same package and the same 1.25°C/W. Higher voltage is the stronger part.
350mJ, 350mJ, 1700mJ, 1080mJ. The 30H15K carries roughly five times the single-pulse energy of the two entry parts, and it reaches it at a higher avalanche current on twice the inductance.
25V, 25V, 15V and 20V across the four. Capacitance falls as drain bias rises, so the printed Ciss values are not a clean ranking of gate loading. Compare gate charge instead, at matched drive voltage.
The switching rows use RL = 0.75Ω, 0.75Ω, 15Ω and 1Ω — a twenty-fold spread in test load. Compare gate-drain charge instead: 45, 18, 13 and 17nC.
But why does that multiplier matter more than the 25°C number? Because it is the difference between a design that runs cool and one that runs away: it scales every conduction loss on your board, and it is the only figure here that is derived rather than printed.
Choose NCE40H12K when the rail is 24V or higher, when you want the lowest guaranteed resistance at the 120A class, or when a 5V driver has to work and you can accept 7.0mΩ. It is also the drop-in upgrade from the 30H12K.
Choose NCE30H15K when the load is inductive and unclamped, when your gate drive is 4.5V and you want the lowest low-voltage resistance in the family, or when you need the 600A pulse rating. It is the rugged one.
Choose NCE30H12K when the rail is 12V or 15V, the load is clamped or resistive, and the gate driver is a real 10V. It is the middle of the family and still the right answer for a lot of boards.
Choose NCE30H10K when 100A is enough, cost leads, and the load does not store energy. It is the entry step, and the entry step is usually underrated for how much of this family actually ships.
Which one should you actually buy? Run three questions in order and the answer falls out.
A: The NCE40H12K and the NCE30H15K tie at 10V, and the 30H15K wins below it. Both publish 4.0mΩ maximum at a 20A test current. At a 4.5V gate the 40H12K rises to 7.0mΩ while the 30H15K stays at 5.0mΩ. At 10V drive the ranking is a tie; at 5V drive it is not close.
A: Because that row is the same thermal calculation applied four times, not four measurements. Each sheet takes its own RθJC, solves for the dissipation available between a 100°C case and a 175°C junction, and divides by the die's hot resistance. Four dice, four thermal resistances, one convention.
A: Only the 40H12K does it comfortably. A 24V rail is exactly 80% of a 30V rating, which is the conventional derating limit, leaving no room for switching-node overshoot. The 40V part puts the same rail at 60% of its rating.
A: The NCE30H15K. It is the only 30V part in the family with a published 4.5V row, and at 5.0mΩ it beats the 40H12K's 7.0mΩ at the same condition. A 5V driver pushes you to the 15K or the 40H12K and to nothing else.
A: The NCE30H15K, by a wide margin — 1700mJ at 58.5A and 1mH. The 40H12K follows at 1080mJ and 46.5A, and the 30H12K and 30H10K both sit at 350mJ. Compare the avalanche current as well as the energy; capability falls as avalanche current rises.
A: No — they were measured at different drain biases. Ciss is quoted at VDS = 25V for the 30H10K and 30H12K, 15V for the 30H15K and 20V for the 40H12K. Capacitance falls as drain bias rises, so the printed ranking of 3300/4120/5000/5400pF is partly a ranking of test voltages.
A: Not answerable from the switching rows — they use different test loads. RL is 0.75Ω for two of them, 1Ω for one and 15Ω for the 30H15K. A twenty-fold difference in load moves switching times more than the die does. Compare Qgd at matched drive voltage instead: 45, 18, 13 and 17nC.
A: Yes, for clamped loads at 10V drive where 100A is enough. It is the entry step of the ladder and the lowest-current option in the family. What it does not have is a 4.5V row, an avalanche rating above 350mJ, or a resistance below 5.5mΩ. Match it to a resistive load and a real 10V rail and it does the job.
A: The footprint, the pinout, the gate window and the junction limit. All four are TO-252-2L with 1 = Gate, 2 = Drain, 3 = Source and the tab on the drain, all four accept ±20V of gate drive, and all four are rated to a 175°C junction. None publishes a steady-state thermal resistance.
A: Above 40V, above roughly 25A continuous, or when you need a steady-state thermal rating. These are 175°C-class dice on a surface-mount tab; the printed currents assume a case held at 25°C or 100°C, which a normal board cannot do. Above the 40V rail, or past tens of amps continuous, a different device class is the honest answer.





