The NCE0140KA is a single N-Channel power MOSFET in TO-252 (DPAK): 100V/40A with RDS(on) of 17mΩ max @ 10V and a 94nC gate charge. Pin 1 is Gate, pin 2 is Drain, pin 3 is Source — and the tab is Drain, electrically the same net as pin 2.
This page covers the pin diagram, the specs that matter, the circuit that uses it most (low-side switching), and the mistakes that show up in support queues.
Pin mapping at a glance: Gate on 1, Drain on 2, Source on 3. The large tab on top is the Drain — the same net as pin 2, and the package's main thermal path out of the die.
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | G | Gate | Gate — drive to VGS ≥ 4.5V to fully enhance (N-Channel) |
| 2 | D | Drain | Drain — high-current path (load side in low-side use) |
| 3 | S | Source | Source — ties to GND in low-side use |
| Tab | D | Drain | Tab = Drain (same net as pin 2) — heatsink path, never tie to GND |
| Parameter | Value |
|---|---|
| Drain-Source Voltage (VDS) | 100V (typ 110V breakdown) |
| Gate-Source Voltage (VGS) | ±20V |
| Continuous Drain Current | 40A @ 25°C / 28A @ 100°C |
| Pulsed Drain Current | 160A |
| RDS(on) @ 10V | 17mΩ max (14mΩ typ) |
| RDS(on) @ 4.5V | 18mΩ max (13mΩ typ) |
| VGS(th) | 0.9V to 1.5V (typ 1.1V) |
| Power Dissipation | 140W @ 25°C (derate 0.94W/°C) |
| Thermal Resistance RθJC | 1.07°C/W |
| Gate Charge | 94nC @ 10V (Qgs 16nC / Qgd 24nC) |
| Input Capacitance | 3400pF typ |
| Body Diode Forward Voltage | 0.85V typ / 1.2V max @ 28A |
| Body Diode Reverse Recovery | 33ns |
| Single-Pulse Avalanche Energy | 520mJ (100% UIS tested) |
| Junction Temperature | -55°C to +175°C |
Specs that matter: per the NCE0140KA datasheet (Rev 1.2), RDS(on) is guaranteed at 4.5V and 10V — a 5V rail turns it fully on, but there is no 3V spec (that's the NCE0125AK's slot in the family).
The 140W PD is a TC = 25°C number; with a realistic case temperature the honest envelope is 20–28A. The tab copper decides which number you actually get.
Circuit 1 — low-side load switch: load between VIN and the drain, source to ground, gate driven from a 5V GPIO through 100Ω with a 100kΩ pull-down to keep the channel off at power-up. The 4.5V spec floor matches the 5V rail directly.
The tab needs the copper it was designed for: 2 oz pours extending 1–3mm past the pad, 6–10 thermal vias to inner planes. That footprint is the difference between the 140W paper rating and 20–28A sustained.
Off-time on a 12V rail with the 94nC gate charge (Qg × R ÷ V):
But why does drive stiffness keep coming up? Because 94nC is the highest gate charge in the 100V family — a 10kΩ gate resistor that was fine on a small SOT-23 turns this part into a slow-motion switch.
Circuit 2 — synchronous rectification (secondary side): in a 48V-to-12V brick, the NCE0140KA replaces the Schottky on the secondary side.
The 33ns body-diode recovery keeps reverse-recovery loss small, and the 4.5V drive matches a 5V bias rail.
Drive it from a real half-bridge driver — at SR frequencies, 94nC of gate charge is beyond a GPIO's budget.
How do you know if your drive is strong enough? Measure the off-time — if the switch takes tens of microseconds to drop, the gate resistor is too weak for this 94nC gate charge.
NCE0140KA is typically in stock at ICMASS with same-day dispatch from Shenzhen. We lot-test RDS(on) at 4.5V and 10V before shipping. Contact us for current pricing and quantity pricing on the 2500-piece reel.
A: Drain — electrically the same net as pin 2. This is the classic DPAK mistake: a heatsink pad tied to the ground plane shorts the 100V rail. If the tab sits on an isolated copper island, the island must not connect to GND unless the schematic says so.
A: 1 is Gate, 2 is Drain, 3 is Source. The tab is also Drain. In a low-side switch, the load connects to pin 2 (and the tab), pin 3 goes to ground, and the gate drive goes to pin 1.
A: No — completely different pinouts. The SOP-8 uses 1–3 Source / 4 Gate / 5–8 Drain; the TO-252 uses 1 Gate / 2 Drain / 3 Source + tab. Moving between packages is a re-layout, not a swap — including the tab copper the TO-252 needs.
A: Electrically, yes — the pin order matches: 1 Gate, 2 Drain, 3 Source, tab = Drain. The difference is mechanical: TO-220 is through-hole with a screw-mount tab; TO-252 reflows onto the board. Same electrical order, completely different board design.
A: It turns on, but not fully — there is no 3V spec. RDS(on) is guaranteed from 4.5V; at 3.3V the die runs partially enhanced at 2–3× the rated resistance. For a 3.3V rail, the family member with a 3V spec is the NCE0125AK.
A: The tab is the heat path — feed it copper. 2 oz pours extending 1–3mm past the pad on every side, 6–10 thermal vias of 0.3–0.5mm into inner planes, solder mask opened over the vias so they fill. The 1.07°C/W RθJC only helps if the board side has somewhere to put the heat.
A: Microsecond-scale inrush and stall events. Hot-plug capacitor banks, motor-start spikes, and changeover glitches. The die must return to normal temperature between events — it's not a license for 160A average, and the 520mJ energy limit is the real constraint for inductive loads.
A: Measure RDS(on) at 4.5V and 10V with a bench supply and milliohm meter. A genuine part reads near 14mΩ typ at 10V and 13mΩ at 4.5V. Counterfeit parts remarked from smaller dies fail the 4.5V check by 2–3× while passing visual inspection — the reason we batch-test before shipping.





